1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device, and in particular, to a semiconductor integrated circuit device having a nonvolatile semiconductor memory.
2. Description of the Related Art
In a nonvolatile semiconductor memory utilized for a recording medium such as a memory card or the like, a redundancy technique is used. The redundancy technique is a technique in which a column (defective column) or a block (defective block) which has brought about a defect in manufacturing is replaced by a spare column (redundant column) or a spare block (redundant block). In accordance therewith, even when there is a column or a block which has brought about a defect in manufacturing, this is relieved by the one being replaced by a spare column or a spare block, and it is possible to maintain an yield of the nonvolatile semiconductor memory, which makes it possible to improve the yield.
In a recent redundancy technique, redundancy information, for example, block replacement information including address information of defective blocks and block information of replacement destinations, or the like in a case of block replacement is stored in an internal ROM, and the block replacement information is read out of the internal ROM during a boot sequence at the time of power-on, and is set in a register (Jpn. Pat. Appln. KOKAI Publication No. 2000-091505). The redundancy information is set in the register because, if the redundancy information is read out of the internal ROM at every access, an access speed may be lowered. A boot sequence is internal processing for a system start-up in a nonvolatile semiconductor memory chip at the time of power-on. Note that the reason why redundancy information is stored in the internal ROM is that it has become difficult to carry out a program such as, for example, a laser beam welding type fusing or the like, i.e., a program involving mechanical fracture in accordance with miniaturization of integrated circuits and large-scale designing of storage capacities.
Moreover, in recent years, as information to be stored in an internal ROM, not only redundancy information, but also trimming information and the like have been included. Trimming information is information for optimizing the setting of a voltage and the like for each chip, or for each production lot by calculating on production tolerance among chips or among production lots.
Further, all information to be read during a boot sequence is once read out of the internal ROM to be stored in a data cache. Thereafter, from the data cache, the redundancy information is transferred to a resister in which redundancy information is set, and the trimming information is transferred to a resister in which trimming information is set.
Moreover, recently, separately from the redundancy technique, the concept of bad block has been newly put to practical use. Bad block is a technique in which a block that has brought about a defect in manufacturing (defective block) is not replaced by a redundant block, but instead disabled. Because a bad block is disabled, a storage capacity is reduced by an amount of the capacity thereof. However, a recent nonvolatile semiconductor memory has a large storage capacity, which means that it has a large number of blocks, and thus there are many blocks unused by a user. To think of this actual situation, a bad block technique is inoffensive from a practical standpoint. In contrast, as compared with nonvolatile semiconductor memories which do not use a bad block technique, it is possible to increase the number of shipments, which makes it possible to provide nonvolatile semiconductor memories inexpensively to users.
Moreover, there has been an attempt to abolish redundancy technique, and to apply bad block technique to all blocks (Jpn. Pat. Appln. KOKAI Publication No. 2005-216345).
Bad block information utilized for the bad block technique as well is one of information utilized during a boot sequence. With respect to a block which has been disabled in accordance with bad block information, when this is accessed, processing in which voltages required for the respective operations of erasing of data, writing of data, and reading of data are not applied to a word line is carried out.
A defective block and a bad block have the same feature in that the both are blocks having brought about defects. However, the redundancy technique is a technique in which a defective block is replaced by a redundant block, and the bad block technique is a technique in which the defective block is disabled. These techniques are different from each another.
For example, in the redundancy technique, when a defective block is accessed, the access is automatically transferred to a redundant block serving as a replacement destination, and the redundant block serving as a replacement destination is accessed. Namely, the defective block is not accessed. Accordingly, the defective block is handled in the same way as other unselected blocks. With respect to a word line of the defective block, voltages required for the respective operations of erasing of data, writing of data, and reading of data are not applied in the same way as the other unselected blocks. In accordance with the redundancy technique, because a defective block is handled in the same way as other unselected blocks, a circuit for controlling voltages applied to word lines is not required.
In contrast thereto, in accordance with the bad block technique, a bad block is handled in the same way as a selected block. Accordingly, because the bad block is accessed, and voltages required for the respective operations of erasing of data, writing of data, and reading of data are applied to a word line thereof. This situation is forcibly restrained on the basis of a flag, in concrete terms, a bad block flag. Therefore, a voltage control circuit for forcibly restraining voltages applied to the word lines is required. However, in the bad block technique, voltages applied to the word lines are forcibly restrained. Thus, with respect to a block which has been registered as a bad block, no voltage is applied to a word line thereof at all even at the time of erasing it, in particular, at the time of batch erasing of the chip.
In this way, voltages applied to word lines are not controlled in the redundancy technique, but voltages applied to word lines are controlled in the bad block technique. Therefore, registers set on the basis of the redundancy information and registers set on the basis of the bad block information are different from each other. As a concrete example, registers in which redundancy information is set are built into an address system circuit, and registers in which bad block information is set are built into a word line system circuit.
With respect to the redundancy information and the bad block information, a redundancy information registration area with which redundancy information is registered, and a bad block information registration area with which bad block information is registered are assigned to the internal ROM, and those are respectively stored therein separately. Data storage addresses in a data cache are made different depending on redundancy information or bad block information. Then, transfer of information to the registers and setting of the registers are respectively carried out by separate operations.
Moreover, recently, it has been believed that a defective block as well is preferably handled in the same way as a bad block. For example, with respect to a defective block according to the redundancy technique, an access to the defective block could be permitted at the time of batch erasing of the chip. In this case, a short-circuit current or the like is expected to occur, and there is a possibility that a power supply capacity is deteriorated, or the chip is broken at worst. Then, a defective block as well is handled in the same way as a bad block, in which case a voltage is not applied to a word line at all even at the time of batch erasing of the chip.
Then, addresses of blocks which have been regarded as defective blocks in manufacturing are registered as bad blocks with the bad block registration area before shipment at the manufacturer side.
However, addresses of the defective blocks and addresses of the bad blocks are redundantly registered with the internal ROM. Namely, the usage rate of the bad block registration area is increased. Therefore, when many redundant blocks are utilized, all of the number of blocks which can be registered as bad blocks cannot be utilized in some cases, which loses a yield thereof.